vtr-verilog-to-routing
✅ Recently maintainedVerilog to Routing -- Open Source CAD Flow for FPGA Research
1,281Stars
451Forks
+17-day stars
C++ · License unverified · Last push 2026-11-02
Official repository & installation ↗GitValue · Value evidence
Unscored · Evidence coverage 0%
Provisional rubric; documentation and runtime testing are separate. Missing evidence does not imply low value.
Star history
2025-09-292026-11-03
View historical data
| Date | Stars |
|---|---|
| 2026-10-04 | 1,269 |
| 2026-10-05 | 1,269 |
| 2026-10-06 | 1,269 |
| 2026-10-07 | 1,270 |
| 2026-10-08 | 1,270 |
| 2026-10-09 | 1,271 |
| 2026-10-10 | 1,271 |
| 2026-10-11 | 1,271 |
| 2026-10-12 | 1,271 |
| 2026-10-13 | 1,274 |
| 2026-10-14 | 1,275 |
| 2026-10-15 | 1,275 |
| 2026-10-16 | 1,277 |
| 2026-10-17 | 1,277 |
| 2026-10-18 | 1,278 |
| 2026-10-19 | 1,278 |
| 2026-10-20 | 1,279 |
| 2026-10-21 | 1,279 |
| 2026-10-22 | 1,279 |
| 2026-10-23 | 1,279 |
| 2026-10-24 | 1,279 |
| 2026-10-25 | 1,279 |
| 2026-10-26 | 1,280 |
| 2026-10-27 | 1,280 |
| 2026-10-28 | 1,280 |
| 2026-10-29 | 1,280 |
| 2026-10-30 | 1,281 |
| 2026-10-31 | 1,281 |
| 2026-11-01 | 1,281 |
| 2026-11-03 | 1,281 |
Get the project
git clone https://github.com/verilog-to-routing/vtr-verilog-to-routing.gitCloning downloads the source. For dependencies and installation, follow the project README.
Related projects & alternative candidates
Related domains do not imply feature parity. Review official documentation and licenses.